1) Field of the Invention
The present invention relates to an operational amplification circuit, an overheat detecting circuit and a comparison circuit.
2) Description of the Related Art
An arrangement of a conventional amplification circuit is as shown in FIG. 8. In FIG. 8, the operational amplification circuit a differential amplification circuit 10 for outputting a signal corresponding to an electric potential difference between input signals inputted to an inverting input terminal IN− and a non-inverting input terminal IN+, respectively, and an outputting circuit 20 for outputting a signal corresponding to an output of the differential amplification circuit 10.
The differential amplification circuit 10 is composed of PNP bipolar transistors 111 to 116, 121, 102 and 122 and NPN bipolar transistors 117 and 118. Each of the transistors 121 and 102 has a multi-collector configuration using two collectors. A common base signal from an external circuit (not shown) is inputted to a base of each of the transistors 121, 102 and 122 so that each collector outputs a constant current according to the voltage of the common base signal.
The bases of the transistors 113 and 114 are connected to the inverting input terminal IN− and the noninverting input terminal IN+ respectively.
The transistors 117 and 118 are connected through their bases to each other to provide a current mirror circuit. The collector of the transistor 117 is connected to the collector of the transistor 111 and further to the base of the transistor 115, and the collector of the transistor 118 is connected to the collector of the transistor 112 and further to the base of the transistor 116. Moreover, a current equal to a current flowing in the transistor 117 flows in the transistor 118.
The outputting circuit 20 is composed of PNP bipolar transistors 203, 204, 222 and NPN bipolar transistors 219, 220, 221.
The bases of the transistors 203 and 204 are connected in common to the bases of the transistors 121, 122 and 102 of the differential amplification circuit 10. Moreover, the base of the transistor 219 is connected to the junction between the collector of the transistor 121 and the emitter of the transistor 116, and the collector of the transistor 219 is connected to the collector of the transistor 203. Still moreover, the emitter of the transistor 219 is grounded through a resistor 230 to make an emitter follower circuit. Yet moreover, the emitter of the transistor 220 is grounded to make an emitted grounded circuit. The collector of the transistor 221 is connected to the positive electrode side of the power supply, the emitter of the transistor 221 is connected to an output terminal OUT. In addition, the emitter of the transistor 222 is connected to the outputting terminal OUT, and the collector of the transistor 222 is connected to the negative electrode side of the power supply.
A description will be given hereinbelow of an operation of the above-described circuit arrangement.
In a case in which an input signal voltage inputted to the inverting input terminal IN− becomes higher than an input signal voltage inputted to the non-inverting input terminal IN+, a current flowing in the transistor 114 becomes larger than a current flowing in the transistor 113 and, hence, a base current of the transistor 112 becomes larger than a base current of the transistor 111 so that a current I2 fed from the transistor 122 flows in the transistor 112 more than in the transistor 111. However, since the currents flowing in the transistors 117 and 118 are equal to each other, a base current of the transistor 115 increases while a base current of the transistor 116 decreases.
Therefore, a current I3′ flowing in the transistor 116 decreases while a base current of the transistor 219 increases. Moreover, a base current of the transistor 220 increases while base currents of the transistors 221 and 222 decrease. Still moreover, the transistor 221 turns off while the transistor 222 turns on, so the logical level of the output terminal OUT becomes low.
In addition, in a case in which an input signal voltage inputted to the inverting input terminal IN− becomes lower than an input signal voltage inputted to the non-inverting input terminal IN+, a current flowing in the transistor 113 becomes larger than a current flowing in the transistor 114 and, hence, a base current of the transistor 111 becomes larger than a base current of the transistor 112, so a current I2 fed from the transistor 122 flows in the transistor 111 more than in the transistor 112. However, since the currents flowing in the transistors 117 and 118 are equal to each other, a base current of the transistor 116 increases while a base current of the transistor 115 decreases.
Therefore, the current I3′ flowing in the transistor 116 increases while the base current of the transistor 219 decreases. Moreover, the base current of the transistor 220 decreases while the base currents of the transistors 221 and 222 increase. Still moreover, the transistor 221 turns on while the transistor 222 turns off, so the logical level of the output terminal OUT becomes high.
In the case of a differential amplification circuit, the differential-amplification-possible input voltage range is referred to as an in-phase input voltage range. In the circuit shown in FIG. 8, when the power supply voltage is taken to be VCC, the emitter-collector voltage (voltage between the emitter and the collector) of the transistor 122 is taken as Vsat and the emitter-base forward-direction voltage of each of the transistors 111 to 114 is taken as Vf (so-called the emitter-base voltage), the upper limit of the in-phase input voltage range is given by VCC− 2Vf− Vsat.
In the operational amplification circuit shown in FIG. 8, although both the input signal voltages to be inputted to the inverting input terminal IN− and the non-inverting input terminal IN+ are made to work within the in-phase input voltage range, both the input signal voltages inputted to the inverting input terminal IN− and the non-inverting input terminal IN+ can get out of the in-phase input voltage range due to an increase in the input signal voltage to be inputted to each of the inverting input terminal IN− and the noninverting input terminal IN+ or a drop of the power supply voltage VCC.
In this case, the transistors 113 and 114 turn off and the transistors 111 and 112 also turn off. Accordingly, the current I2 does not flow in the transistors 111 and 112.
In addition, the transistor 115 turns on, and a current I1 fed from the transistor 121 flows into each of the bases of the transistors 117 and 118. Since equal currents flow into the transistors 117 and 118, the transistor 116 turns on and a base current of the transistor 116 flows in the collector of the transistor 118.
In the above-described operational amplification circuit, when the current amplification factors of the transistors 115, 116, 117 and 118 are taken as hFE15, hFE16, hFE17 and hFE18, the current I3′ flowing in the emitter of the transistor 116 is given by the following equation (1).
                                                                        I3                ′                            =                            ⁢                                                I1                  /                  hFE15                                ·                                  (                                      1                    -                                          (                                                                        1                          /                          hFE17                                                +                                                  1                          /                          hFE18                                                                    )                                                        )                                ·                                                                                                      ⁢                                                hFE18                  /                  hFE17                                ·                hFE16                                                                                        =                            ⁢                              I1                ·                                  (                                      1                    -                                                                  1                        +                                                  hFE17                          /                          hFE18                                                                    hFE17                                                        )                                ·                                  hFE18                  hFE17                                ·                                  hFE16                  hFE15                                                                                        (        1        )            
In general, in the equation (1), since hFE17 and hFE18 are approximately 100 to 200, assuming that (1+hFE17/hFE18)/hFE17≈0 (approximately equal to 0), the current I3′ flowing in the emitter of the transistor 116 is approximated to the equation (2).
                              I3          ′                =                  I1          ·                      hFE18            hFE17                    ·                      hFE16            hFE15                                              (        2        )            
In the equation (2), in a case in which the pair compatibility between the transistors 115, 116 and between 117, 118 are high, the current amplification factors hFE15 and hFE16 of the transistors 115 and 116 are equal to each other and the current amplification factors hFE17 and hFE18 of the transistors 117 and 118 are equal to each other and, hence, I3′=I1. Moreover, if the pair compatibility between the multi-collectors of the transistor 121 is high, I1=I3.
However, the relationship between I3 and I3′ becomes I3>I3′ or I3<13′ depending upon the pair compatibility of the transistors 115, 116 and 117, 118 or the pair compatibility of the multi-collector of the transistor 121. Incidentally, in fact, the relationship does not show I3<I3′, and venturing to say, the current drive ability of the transistor 116 is larger than I3, and I3=I3′. In the case of I3>I3′, the transistor 219 turns on, the transistor 220 turns on, the transistor 221 turns off and the transistor 222 turns on, so the logical level of the output terminal OUT becomes low. On the other hand, in the case of I3=I3′, the transistor 219 turns off, the transistor turns off, the transistor 221 turns on and the transistor 222 turns off, so the logical level of the output terminal OUT becomes high.
Accordingly, in a case in which there appears an input outside the aforesaid in-phase input voltage range, there is a problem in that the logical level of the output terminal OUT cannot be fixed to a desired level due to the pair compatibility of the transistors 115, 116 and 117, 118 or the pair compatibility of the multi-collector of the transistor 121.
In this case, although it is considered that a balance resistor is inserted into the emitters of the transistors 117 and 118 to deteriorate the balance on purpose for fixing the logical level of the output terminal OUT to a desired level, this creates a problem in that, for example, the offset performance deteriorates in an normal operation.
In addition, FIG. 9 shows a conventional overheat detecting circuit. The conventional overheat detecting circuit is provided with a PNP multi-collector transistor 301, an NPN transistor 302, a temperature detecting diode 303, a comparator 304, a constant-voltage source 305 and a diode 306.
As illustrated, a base signal from an external circuit (not shown) is inputted to the base of the multi-collector transistor 301 and, in accordance with a voltage of this base signal, currents I5 and I6 (for example, 10 μA) equal to each other flow in collectors designated at circled numerals 5 and 6. Moreover, the current I5 flows from the collector 5 into the transistor 302 while the current 16 flows from the collector 6 into the temperature detecting diode 303.
As indicated by VF (10 μA) in FIG. 10, a forward-direction drop voltage VF of the temperature detecting diode 303 lowers as the temperature rises and, conversely, it rises as the temperature drops.
Moreover, the forward-direction drop voltage VF of the temperature detecting diode 303 is applied to an inverting input terminal—of the comparator 304, while a threshold voltage Vth is applied through the constant-voltage source 305 to a non-inverting input terminal + of the comparator 304.
In the circuit shown in FIG. 9, in a case in which the temperature is low and the voltage VF applied to the inverting input terminal—of the comparator 304 is higher than the threshold voltage Vth applied to the non-inverting input terminal + of the comparator 304, a low-level signal is outputted from an output terminal of the comparator 304. Meanwhile, if, due to a rise of the temperature, the voltage VF applied to the inverting input terminal —of the comparator 304 becomes lower than the threshold voltage Vth applied to the non-inverting input terminal + of the comparator 304, a high-level signal is outputted from the output terminal of the comparator 304.
On the other hand, as indicated by VF (10 μA), VF (20 μA) in FIG. 10, the forward-direction drop voltage VF of the temperature detecting diode 303 becomes higher as the current flowing in the temperature detecting diode 303 becomes larger.
The circuit shown in FIG. 9 is made such that the detected temperature has a hysteresis by varying the current flowing in the temperature detecting diode 303. The transistor 302 and the diode 306 organizes a circuit whereby the detected temperature has the hysteresis.
In FIG. 9, when the forward-direction drop voltage VF of the temperature detecting diode 303 becomes below the threshold voltage Vth with a rise of the temperature, the transistor 302 turns on in response to the high-level signal from the comparator 304, and the current I6 flowing in the collector 6 of the multi-collector transistor 301 flows into the transistor 302. That is, the current I6 (10 μA) from the collector 6 of the multi-collector transistor 301 flows in the temperature detecting diode 303.
Moreover, in a case in which the temperature is low and the forward-direction drop voltage VF of the temperature detecting diode 303 exceeds the threshold voltage Vth, the transistor 302 turns off in response to the low-level signal from the comparator 304, and the current I6 flowing in the collector 6 of the multi-collector transistor 301 flows through the diode 306 into the temperature detecting diode 303. That is, the current 15 from the collector 5 of the multi-collector transistor 301 and the current 16 from the collector 6 thereof (20 μA in total) flows in the temperature detecting diode 303.
Thus, in a case in which the detected temperature is lower than a temperature T1 and in a case in which the detected temperature rises from the temperature T1 to a temperature T2, the transistor 302 turns off, and the forward-direction drop voltage VF of the temperature detecting diode 303 shows a characteristic indicated by VF (20 μA) in FIG. 10. Conversely, in a case in which the detected temperature is higher than the temperature T2 and in a case in which the detected temperature drops from T2 to T1, the transistor 302 turns on, and the forward-direction drop voltage VF of the temperature detecting diode 303 shows a characteristic indicated by VF (10 μA) in FIG. 10.
As described above, the conventional overheat detecting circuit is designed to make the detected temperature have a hysteresis by varying the current flowing in the temperature detecting diode 303 through the use of the transistor 302 and the diode 306.
Furthermore, FIG. 11 shows an arrangement of a conventional comparison circuit. As illustrated, the comparison circuit is composed of resistors 401 to 403, an NPN transistor 404 and a comparator 405.
As illustrated, the resistors 401 to 403 are connected in series between a power supply VCC and the ground (GND), and a threshold voltage Vth obtained through the voltage division by the resistors 401 to 403 is applied to the inverting input terminal − of the comparator 405. In a case in which the voltage of an input signal inputted through an input terminal IN is higher than the threshold voltage Vth, a high-level signal is outputted from an output terminal of the comparator 405, and in a case in which the voltage of the input signal inputted through the input terminal IN is lower than the threshold voltage Vth, a low-level signal is outputted from the output terminal of the comparator 405.
Moreover, in the circuit shown in FIG. 11, the switching function of the transistor 404 varies the threshold voltage Vth serving as a reference voltage to make the comparison circuit have a hysteresis. That is, when the transistor 404 falls into an off state, as shown in FIG. 12, the threshold voltage Vth becomes VthH, and when the transistor 404 turns off, the threshold voltage Vth becomes VthL.
Still moreover, as shown in FIG. 12, if the voltage at the input terminal IN becomes higher than the threshold voltage VthL developing when the transistor 404 is on, the voltage at the output terminal OUT becomes at a high level, and if the voltage at the input terminal IN becomes lower than the threshold voltage VthH developing when the transistor 404 is off, the voltage at the output terminal OUT becomes at a low level.
As described above, in the conventional comparison circuit, the threshold voltage Vth obtained by the resistance division of the resistors 401 to 403 is applied to the inverting input terminal —of the comparator 405, and a hysteresis is developed by varying this threshold voltage Vth through the use of the switching of the transistor 404.